XilQuake

Eric Buehl
Matthew Douglass-Riley
Mitchell Jewell

Project for 18-545, Advanced Digital Design Project
Fall 2007

Background

Xilinx VIrtex-II PRO

· FPGA: Field-Programmable Gate Array

o Array of generic logic gates

o Can program logic functions of each gate

o Can program interconnection between gates

· 2 PowerPC cores (max speed 400 MHz)

· 512MB DDR SDRAM

· VGA video port

· 10/100 Ethernet port

· AC97 Audio Codec

· 2 PS2 ports

· Compact Flash card slot

Quake

· Released in 1996

· Engine open-sourced under GPL in 1999

· Code base contains over 100k lines of code

Rough Overview of Quake Architecture

Functional Units

System Driver

· SystemACE loads hardware bitstream onto FPGA and ELF into RAM

· Game data is loaded into memory file system

· Hardware is initialized

· Game code takes over

o Almost entirely unmodified

· Interrupts are generated for hardware events

o Sound, input, networking

Video Driver

· Game gives palette of RGB values to driver

· Game fills video buffer with indexes into palette

· From this, driver updates VGA buffer with RGB values

· Problems:

o VGA driver doesn’t properly handle its RST signal

§ Signal from hardware to monitor is reset: scanning starts again at first line

§ Counter for reading from RAM into BRAM (closer to the hardware) is not reset

§ Results in a (thankfully consistent) 250-pixel offset in our case

§ Solution: Offset “virtual” coordinate by 250 to get “real” value

o Higher resolution results in slower game play

§ While the game is playable at 640x480, it is much more enjoyable at 320x200, which we center on the screen

Floating Point Unit

· No “hard” core FPU included in Xilinx’ library for the Virtex-II

· Software works, but is slow

· Implemented individual operations in FPGA fabric with the help of Coregen

· Interface to CPU with On Chip Memory (OCM) bus

· Operations are at least 10x faster in hardware

· Bulk of time is still spent in bus transactions/io syncing

Sound Driver

· Sound buffer filled once per frame

· Direct Memory Access (DMA) buffer stores 512 samples

o Fine at 20+ frames per second (11 kHz / 512), but not at slower fps

· Solution: Virtual DMA

o Large circulating buffer much bigger than 512 samples

o Interrupt triggered when audio codec is half full, refills DMA from virtual DMA

o Can store more than 512 samples at a time, so slow fps does not destroy sound

Input Driver

· Interrupt fires when key is pressed, scancode is stored in large, circulating buffer

· Every frame, buffer is emptied, telling Quake which keys were pressed and which were released

Networking Driver

· Quake implements its own sockets protocol on top of transport layer network driver

· Implemented User Datagram Protocol (UDP) using Lightweight IP (lwIP)

o Xilinx provides lwIP

o lwIP includes UDP functions necessary to implement Quake transport layer network driver

Multiplayer XilQuake

Project DEliverables

Available as a ZIP archive

Note: Quake source code is © id Software, released under the GPL. The game content (PAK files) is not included in this distribution.