Berkin Akin

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Conference Papers

B. Akin, F. Franchetti and J. Hoe,
HAMLeT: Hardware Accelerated Memory Layout Transform within 3D-stacked DRAM
Proc. of IEEE High Performance Extreme Computing Conference (HPEC), September, 2014, to appear.

F. Sadi, B. Akin, T. Popovici, J. Hoe, L. Pileggi, and F. Franchetti,
Algorithm/Hardware Co-optimized SAR Image Reconstruction with 3D-stacked Logic in Memory
Proc. of IEEE High Performance Extreme Computing Conference (HPEC), September, 2014, to appear.

B. Akin, F. Franchetti, J. C. Hoe
Understanding the Design Space of DRAM-Optimized Hardware FFT Accelerators
Proc. of IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP), Zurich, Switzerland, 2014.

B. Akin, F. Franchetti, J. C. Hoe
FFTs with Near-Optimal Memory Access Through Block Data Layouts
Proc. of IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), Florence, Italy, 2014.

Q. Zhu, B. Akin, H. Sumbul, F. Sadi, J. C. Hoe, L. Pileggi, F. Franchetti
A 3D-Stacked Logic-in-Memory Accelerator for Application-Specific Data Intensive Computing
Proc. of IEEE International 3D Systems Integration Conference (3DIC), San Francisco, CA, 2013.

B. Akin, P. Milder, F. Franchetti, J. C. Hoe
Memory Bandwidth Efficient Two-Dimensional Fast Fourier Transform Algorithm and Implementation for Large Problem Sizes
Proc. of IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), Toronto, Canada, April, 2012.

Posters

B. Akin, P. Milder, F. Franchetti, J. C. Hoe
Algorithm and Architecture Optimization for Large Size Two Dimensional Discrete Fourier Transform
Proc. of ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA), Monterey, CA, February, 2012, Poster.

B. Akin, P. Milder, F. Franchetti, J. C. Hoe
Algorithm Design for the Memory Wall
SRC/C2S2 Annual Review, Pittsburgh, PA, October, 2011, Poster.